1. Field of the Invention
The present invention relates to a semiconductor device that houses a semiconductor element, and to a method for manufacturing the semiconductor device.
2. Description of the Related Art
Size reduction, increased functionality, and increased performance of electronic devices have been in demand in recent years, and high-density packaging techniques for semiconductor packaging have therefore become essential. Wire bonding connection using metal wire or the like, and flip-chip connection using solder balls, have been used as conventional methods for connecting a wiring board with a semiconductor element, but these methods all have such problems as are described below. For example, wire bonding connection has the merit of low cost, but because the wire diameter must be reduced in narrower pitches, wire breakage and confined connection conditions occur. In flip-chip connection, higher speed transmission is possible than in a wire bonding connection, but in the case of narrow-pitch connections or a large number of terminals in the semiconductor element, the connection strength of the solder bumps is reduced, and there is therefore an increased occurrence of cracking in the connection locations, and connection defects are created by voids.
Therefore, semiconductor devices in which a semiconductor element is built into a board, i.e., semiconductor element embedding techniques, have been recently proposed as high-density packaging techniques that make it possible to achieve increased integration and functionality of semiconductor devices, and that have numerous merits such as reduced package profile, reduced cost, high-frequency response, and low-stress connection by plating connections. Semiconductor devices that utilize the semiconductor element embedding technique are disclosed in Japanese Patent Application Kokai Publication Nos. 2002-16173, 2001-250902, and 2001-237362, for example.
However, in the conventional semiconductor element embedding technique, a semiconductor element (chip) is first mounted on one side, on both sides, or in a concave part provided to a flat surface of a substrate composed of resin or metal. Because of cost and other reasons, a substrate composed of resin or metal and used in a board process must be a large sheet, but because of warping, swelling, and lack of flatness in a substrate composed of resin or metal, it becomes difficult to mount the chip on the substrate with high precision. Since a positioning mark for mounting the chip must also be provided in advance on the substrate, the step for forming the positioning mark contributes to increased cost.
As shown in FIGS. 1 and 2, a conventional semiconductor device has positioning marks 22 or depressions 27 based on such positioning marks. However, the positioning marks 22 and the depressions 27 based on such positioning marks act as non-flat portions of the surface of an insulation resin 12 and are the origins of cracks, and therefore cause reduced reliability of the semiconductor device. When the substrate is metal, the metal must be etched to remove the substrate after manufacturing in order to reduce the thickness of the semiconductor device. Consequently, costs are increased by the increased amount of processing.